I'm currently working on a daughterboard for a "lesser brother" of sDIP64/PLCC68 D8X, namely D8X-42 (DIP42/PLCC44). I decided to use ATMega128A instead of CPLD and some SRAM to use ROM emulators/upload firmware from ATMega.
I got a simple question on the IRP signal functionality. In ancient 3Y-EU ECU (MC6801-based) IGF signal was examined by a special register, responsible for handshake protocol. A rising-edge signal on a special pin sets bit in a register. Until MCU reads this register, that bit stays active. If IGF won't come, the bit would not be set and MCU reports an error code.
A more advanced D8X-42-based 3Y-EU ECU has IGF signal wired to, presumably, IRP (or IRL?) signal that probably have similar function. But, in case of D8X-42, it triggers latch of PORTA data into PORTAL, right?