Any chance you have more documentation on more of the I/O? For instance the SMRC_SIR bits? I noticed you've labeled the SIN1 - 3, and i'm guessing bit 0 is SIN0.
What of TAIT? I only see bit4 as ASR2 edge trigger and bit5 as ASR3 edge trigger.
SSD? I see bit7 indicates data in the input buffer, bit5 is ready to accept byte to output buffer?
DOUT, LDOUT, and DOM? I see clearing DOM, sets DOUT bits to immediate latch, but what else can be done with them?
I see setting DDRA and DDRB bits set the respective port A/B bits to outputs instead of inputs. Now does PORTAL latch on only inputs or outputs as well? I don't see any use for PBCS as its always cleared, so I'm not sure its operation.
As for bit4 - bit7 of PORTD, I don't see any code using it, so I'm not sure on its operation as well. RAMST I only see read/write control for $80 - $90, not sure on the rest of it.
Finally for the interrupt request control. Say for instance CPR0 matches the TIMER value, is IRQL bit set immediately, or is it only set if the IMASK bit matches? If it is set immediately, I figure it pretty much "queues" the interrupt until the appropriate IMASK bit is set, then it will run. Otherwise I'm guessing it will only set the IRQL bit if the appropriate IMASK bit is set, and call the interrupt as soon as it sees the IRQL bit.
Sorry for all the questions, I've yet to finish the reader board, so I'm unable to test any of these.
